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TEE remote attestation for AI workloads

R3In production⚠ Open critical flawsProvider-reported

Trusted execution environment (TEE) remote attestation lets a remote party check which software processed an AI workload.

A TEE isolates a workload from the machine's operator and signs a report of the code and configuration it loaded. NVIDIA's Hopper and Blackwell GPUs support this paired with Intel TDX or AMD SEV-SNP confidential virtual machines. Research prototypes use it to show which model produced a result without revealing weights.

Tinfoil, Apple and Meta report using it in production AI services. It is not ready for verification between rival states, where the party being checked holds the hardware. Chip vendors treat sophisticated physical attacks as out of scope.

Independent researchers with memory-bus devices costing under $50 to under $1000 forged Intel and AMD attestations, and software-only attacks forged AMD attestations on platforms without AMD's firmware fixes. An attestation covers one deployment at launch, and trust rests on a few hardware vendors.

Readinessmedium confidence

Tinfoil relies on the attestation of commercial GPU confidential computing in production, but the independent evaluations left critical flaws open.

Rubric assessment

Assessed use: showing which software ran to a party that distrusts the operator holding the hardware

  • R1 met: designs with stated claims and assumptions are published for audits, property attestation and policy enforcement 8 9 11.
  • R2 met through Tinfoil's model-identity chain. It is an open-source production deployment on NVIDIA H100, H200 or B200 GPUs with AMD SEV-SNP or Intel TDX (provider-reported) 18 20 21. Attestable Audits and PAL*M add end-to-end results against stated adversaries 8 9.
  • R3 met through reliance by another party. Tinfoil, which did not build the TEEs, relies on the attestation in production: its service checks each GPU's attestation at boot and does not start if the check fails 19 20. Apple Private Cloud Compute is another production deployment (provider-reported) 24. As context, GPU confidential computing is a documented product feature 1, and NVIDIA reports that Azure's confidential H100 virtual machines became generally available in 2024 22.
  • R4 not met. The independent public evaluations of the underlying TEEs (TEE.fail, DDRop, Battering RAM, WireTap, RMPocalypse and Fabricked) all found critical flaws, and the four that need physical access remain open. TEE.fail used physical access, root privileges and under $1000 of equipment to extract a CPU's Intel provisioning certification key, which anchors SGX and TDX attestation, and forge TDX attestations. Paired with relayed H100 attestations, the forgeries let a workload outside TEE protection pass both checks 3. DDRop forged TDX attestation reports on an up-to-date platform with a DDR5 interposer costing under $200 33. On DDR4 servers, Battering RAM and WireTap forged SGX attestations with interposers costing under $50 and under $1000, and Battering RAM also broke SEV-SNP attestation 4 5. These physical attacks defeat the main claim when the prover controls the hardware. NVIDIA lists sophisticated physical attacks as out of scope 1. Intel and AMD treat interposer and other physical attacks on memory as out of scope, according to the researchers 3 4 5 33. RMPocalypse and Fabricked forged SEV-SNP attestations from malicious host software, with no physical access 6 34. AMD reports firmware fixes for both 7 35. An independent analysis of NVIDIA's GPU confidential computing found residual metadata and timing leaks but reported no attestation break 36. Trail of Bits' pre-launch audit of WhatsApp's deployment found high-severity implementation flaws that Meta fixed, and notes that SEV-SNP does not fully protect against advanced physical attacks 29 30. The breaks do not invalidate the R2 and R3 evidence, which concerns working implementations and production use.
Gaps to the next level
  • Attestation that survives an attacker who physically holds the hardware, for example through memory integrity and freshness protection or tamper-responsive enclosures, confirmed by independent red-teaming.
  • GPU attestation cryptographically bound to the specific confidential VM it serves.
  • Coverage of whole-chip and multi-node activity, beyond a single deployment.
  • Roots of trust and key provenance that rival parties accept, beyond one vendor's certificate authority.
  • Measurement of runtime configuration as well as launch state.

Assessed 2026-09-25 against rubric v1.1.

On this page

How it works

A trusted execution environment (TEE) is a hardware-enforced boundary around a computation. TEEs aim to protect confidentiality and integrity even from an attacker who controls all of the host's software 3. In a confidential virtual machine (CVM), the CPU encrypts the VM's memory so that the hypervisor and other privileged software cannot read or tamper with it 19.

The hardware measures each piece of software before it runs. It signs a report of those measurements with keys that chain to the manufacturer 18. A remote verifier checks the signature chain back to the vendor's root certificate. It then compares the measurements with expected values, which may come from reproducible builds published to a transparency log 19.

NVIDIA extends attestation to its GPUs. In NVIDIA's description, an on-die root of trust checks the GPU's fused identity key and permits only signed firmware. The driver then opens an authenticated session with the GPU and obtains a signed attestation report 1 2. The GPU must be paired with a CPU TEE, either Intel TDX or AMD SEV, and NVIDIA recommends SEV-SNP 1.

Other designs attest the accelerator alone. GuardAIn gives a discrete neural processing unit (NPU) measured boot and task attestation without relying on a CPU TEE 12.

Several verification schemes build on these reports:

  • Attestable Audits has the model provider and the auditor each send encrypted inputs to an enclave. The enclave runs the audit and publishes an attestation that links the model hash, the audit and the result. Later inference is checked against the audited hash 8.
  • PAL*M attests dataset, training, fine-tuning, evaluation and inference operations on Intel TDX with an H100 9.
  • Tinfoil binds the served weights to the attestation, as described under Model identity attestation 10.
  • Gloria Z proposes running auditable, reproducibly built software inside a CVM to enforce access control, audit logging and safety classifiers 11.
  • The Future of Life Institute (FLI) and Mithril Security built an Intel SGX proof of concept for leasing a model with protected weights, usage telemetry and an off-switch 16.

What it establishes

An attestation can show two things, provided the hardware is sound and the vendor's keys are not compromised:

  • A specific, measured software stack produced a given output from inputs identified by hash 9.
  • The stack ran on genuine vendor hardware in confidential mode 19.

This supports positive claims, such as which model answered (The declared model is the one being served) or which policy code wrapped it (Declared safeguards were applied during inference).

An attestation has three gaps:

Threat model

TEE designs treat the operator's software as hostile, including the host operating system, the hypervisor and the cloud stack 9 18. They trust the hardware and its vendor 8 18. Each vendor and research design lists attacks it does not defend against:

  • NVIDIA lists software, basic physical, rollback, cryptographic and replay attacks as in scope. Sophisticated physical attacks and denial of service are out of scope 1.
  • Intel and AMD consider memory-bus interposer attacks and other physical attacks on memory out of scope, according to the TEE.fail, DDRop, Battering RAM and WireTap authors 3 4 5 33.
  • PAL*M excludes side channels and physical attacks such as memory-bus interposition or swapping GPUs 9.
  • GuardAIn excludes side channels and denial of service 12.

International verification faces a stronger adversary. Gloria Z describes it as a nation-state that may have advance physical access to data centres and leverage over hardware vendors 11. Other analysts also doubt that TEEs hold up against physical access:

  • The flexHEG authors judge TEE-backed software "probably not secure against sophisticated actors if they have unrestricted physical access" 17.
  • The Center for a New American Security (CNAS) says existing features need hardening before they can be relied on in adversarial settings 14.
  • RAND notes that an attacker with physical access may be able to extract both the keys and the protected data 15.

Evidence

  • NVIDIA documents confidential computing for Hopper and Blackwell GPUs 1.
  • Tinfoil reports support for H100, H200 and B200 GPUs 18 and a production inference deployment 20. Its model-identity tool is open source 21.
  • PAL*M reports under 11% overhead for common operations on Intel TDX with an H100. For inference attestation across three models, total observed overhead was 3.8–11.4% for multi-turn sessions and 45.5–66.4% for single prompts. Its code is "to be released after peer review" 9.
  • Attestable Audits ran its prototype on CPU-only AWS Nitro Enclaves with a 4-bit Llama-3.1-8B. CPU inference cost 21.7 times as much per token as GPU inference, and the enclave roughly doubled the CPU cost. The authors expect a production version on confidential-computing GPUs to have "an overhead as small as 5×" 8.
  • GuardAIn reports under 0.1% inference overhead for Llama variants on a Huawei Ascend 910A 12.
  • FLI and Mithril call their SGX prototype "not necessarily deployable as is", because of performance and hardware attacks that need mitigation 16.
  • Public clouds sell confidential GPU virtual machines. NVIDIA reports that Azure's NCC H100 v5 confidential VMs became generally available in two regions in September 2024 22. Google reports that its Private AI Compute, launched in November 2025, uses remote attestation and encryption to connect users' devices to Gemini models in a sealed environment on its TPUs 23.
  • Apple Private Cloud Compute sends each request only to servers that attest to software listed in a public transparency log, according to Apple 24. In June 2026 Apple announced an extension to Google Cloud on NVIDIA confidential computing and Intel TDX 25. An independent researcher reports that a node in Apple's research environment passed its attestation check with tampered configuration files, until Apple fixed the bug that allowed the tampering 26.
  • Meta reports that WhatsApp's Private Processing runs AI requests in confidential VMs on AMD SEV-SNP with NVIDIA Hopper GPUs, and that clients check each attestation against a third-party transparency log 28. In a pre-launch audit, Trail of Bits reports finding 28 issues, eight of them high severity, including configuration data loaded outside the measurement, attestations with no freshness guarantee and GPU attestation that was not verified 29 30. Meta fixed 16 and partly addressed four before launch 29.
  • Anthropic, with Pattern Labs, sketches a confidential inference design in which a small model loader with an attested boot decrypts data only inside a trusted environment before passing it to the accelerator. It aims to protect both user data and model weights, and Anthropic calls the work early 27.

Limitations

  • A physical attacker can forge attestations. In TEE.fail, independent researchers with physical access, root privileges and equipment costing under $1000 extracted a per-CPU Intel key that certifies attestation keys from an up-to-date machine, and forged TDX attestations. They paired the forgeries with genuine H100 attestations relayed from rented hardware, and a workload outside TEE protection passed both checks 3. A second team forged TDX attestation reports with an active DDR5 interposer costing under $200 33. On DDR4 servers, Battering RAM and WireTap forged SGX attestations with interposers costing under $50 and under $1000, and Battering RAM also broke AMD SEV-SNP attestation 4 5.
  • A software attacker has forged attestations too. In RMPocalypse, a malicious hypervisor faked SEV-SNP attestation on Zen 3, Zen 4 and Zen 5 processors without physical access 6. Fabricked did the same on Zen 5 from the hypervisor and UEFI firmware, by misconfiguring the processor's interconnect 34. AMD reports firmware fixes for both 7 35.
  • Side channels and other attacks by the host remain. PAL*M and Attestable Audits cite earlier side-channel, interrupt-injection and memory-aliasing attacks on CPU TEEs 8 9, and new ones such as StackWarp continue to appear 32. An independent analysis of NVIDIA's GPU confidential computing found metadata and timing leaks in unprotected shared memory 36. NVIDIA disables performance counters in confidential mode because they could provide an avenue for side-channel attacks 1. Gloria Z notes that counters have leaked secrets from TEEs 11.
  • Coverage of large systems is incomplete. Hopper does not encrypt NVLink 1. NVIDIA's early-access release lacked multi-node support in mid-2025 17, and its April 2026 release notes list confidential modes only for GPUs passed through to a confidential VM, with no multi-node mode 31. O'Gara et al. ask what changes would be needed to use TEEs for verifying AI training across multi-node, multi-GPU systems at scale 13.
  • The root of trust rests with a few vendors (AMD, Intel and NVIDIA) 11.

Known flaws

Published flaws, with their severity, kind and status. How flaws are rated.

  • DDR5 memory-bus interposers forge Intel TDX attestations and break SEV-SNP protections (TEE.fail, DDRop)CriticalDemonstrated attackOpen

    Independent researchers placed an interposer, built for under $1000, on the DDR5 memory bus of servers running Intel TDX and AMD SEV-SNP. Server TEEs encrypt memory deterministically, without integrity or freshness protection, and the researchers exploited this to recover secrets. The attack needs physical access and root privileges 3.

    • On Intel, they extracted the provisioning certification key from a machine that Intel's service rated fully up to date. This per-CPU key signs the keys used in SGX and TDX attestation. With it they forged SGX and TDX attestations 3.
    • On AMD SEV-SNP with ciphertext hiding enabled, they recovered an ECDSA private key used by OpenSSL inside the virtual machine. It was not an AMD attestation key 3. Other independent attacks did break SEV-SNP attestation. Battering RAM did so with a DDR4 interposer, and RMPocalypse and Fabricked from malicious host software 4 6 34.

    A second team, from KU Leuven, ETH Zurich, Durham University and Google, built DDRop, an active DDR5 interposer with a bill of materials of $159. It silently drops memory writes, which memory encryption without freshness protection cannot detect. With brief physical access and control of the host software and BIOS, the researchers forced trust domains into debug mode and forged attestation reports on an up-to-date Intel TDX platform. The same primitive breaks the integrity of Scalable SGX and SEV-SNP, though the authors report no SEV-SNP attestation forgery 33.

    The TEE.fail authors report that Intel and AMD consider interposer attacks out of scope, which leaves physical security as the only mitigation 3. The DDRop authors report the same position, and that both vendors issued security advisories on disclosure in September 2026 33. PAL*M lists this attack class as out of its scope 9, and Tinfoil's documentation acknowledges it 18. Gloria Z calls key extraction through bus interposition "relatively low-hanging fruit" in an international treaty scenario 11.

  • DDR4 memory-bus interposers forge SGX and SEV-SNP attestation (Battering RAM, WireTap)CriticalDemonstrated attackOpen

    Two independent teams broke server TEE attestation on DDR4 memory with interposers they built themselves. Both attacks need physical access to install the device and root privileges on the host 4 5.

    • Battering RAM, by researchers at KU Leuven and the Universities of Birmingham and Durham, uses an interposer with a bill of materials of $47.62. It creates memory aliases at runtime, which bypasses the boot-time alias checks that AMD and Intel introduced against static aliasing attacks such as BadRAM. On Intel Scalable SGX it gained arbitrary read and write access to enclave plaintext and extracted SGX's platform provisioning key, which lets an attacker forge attestation certificates for arbitrary quoting enclaves. On up-to-date AMD SEV-SNP servers it captured the launch digests of genuine VMs and replayed them into modified VMs, so that backdoored VMs pass attestation 4.
    • WireTap, by researchers at Purdue University and Georgia Tech, uses an interposer built for under $1000 that records DDR4 bus traffic. On a Xeon Scalable server in fully trusted status it recovered the ECDSA attestation key of SGX's Quoting Enclave in 45 minutes and forged SGX quotes. The authors then showed end-to-end attacks on SGX-based blockchain deployments 5.

    Both attacks are limited to DDR4 systems. The Battering RAM authors state that all commercial TDX machines use DDR5, and the WireTap authors state that 4th and 5th generation Xeon Scalable processors need DDR5 and are not affected by their current work 4 5. According to the Battering RAM authors, Intel and AMD acknowledged the findings but consider physical attacks on DRAM out of scope for their current products 4. The WireTap authors report that Intel considers their attack outside the SGX threat model, and that there is no mitigation besides running servers in secure physical environments 5.

  • Software-only forgery of SEV-SNP attestation (RMPocalypse, Fabricked)CriticalDemonstrated attackMitigated

    Researchers at ETH Zurich showed that a malicious hypervisor can corrupt the Reverse Map Table (RMP) while SEV-SNP initialises it. SEV-SNP uses the RMP to store security metadata for every DRAM page, and a single 8-byte overwrite leaves the whole table compromised. The attack needs no physical access. The authors confirmed it on Zen 3, Zen 4 and Zen 5 processors and state that it affects all AMD processors that support SEV-SNP. They demonstrated forged attestation values, debugging enabled on production confidential VMs, reads and writes of encrypted VM memory, and replay of VM register state 6.

    AMD assigned CVE-2025-0033 6. Its bulletin rates the issue medium severity and reports SEV firmware, microcode or platform firmware updates for every affected EPYC server and embedded series, with release dates from June 2025 to February 2026 7.

    In Fabricked, researchers from the same ETH Zurich group showed that a host controlling the hypervisor and UEFI firmware can misconfigure the Infinity Fabric interconnect so that the AMD Secure Processor initialises SEV-SNP incorrectly. On a Zen 5 EPYC processor this gave arbitrary reads and writes in the victim VM and forged attestation reports 34. AMD assigned CVE-2025-54510, rates it medium severity and reports platform firmware updates for its EPYC 7003, 8004, 9004 and 9005 server series, released in November and December 2025 35.

  • H100 attestation not bound to a specific confidential VMSignificantDemonstrated attackOpen

    The TEE.fail authors fetched genuine H100 confidential-computing attestations from a rented server running their TDX VM. They combined these with forged TDX quotes. A proxy running outside any TEE then passed both the TDX and the GPU attestation checks. The authors attribute this to NVIDIA not binding the H100 to the identities of specific VMs. Their site states more generally that NVIDIA's attestation reports are not bound to a specific confidential VM or CPU. Intel, AMD, NVIDIA and the affected deployments acknowledged the findings, according to the authors, and the affected deployments were working on mitigations. The attack does not target NVIDIA's confidential-computing components directly, so the authors state that there are no mitigations on the NVIDIA side 3.

  • Side channels and other attacks by the host on CPU and GPU TEEsSignificantDemonstrated attackOpen

    PAL*M and Attestable Audits cite published side-channel, single-stepping, interrupt-injection and memory-aliasing attacks on Intel TDX and AMD SEV, including T-Time, TDXploit, CIPHER-LEAKS, Heckler and BadRAM. PAL*M treats them as out of scope 9. Attestable Audits proposes revoking vulnerable enclave images 8. Gloria Z notes that performance counters have themselves been used as a side channel, for example in CounterSEVeillance 11. New attacks of this kind continue to appear. In StackWarp, researchers at CISPA showed that a malicious hypervisor can shift the stack pointer of an SEV-SNP guest on AMD Zen 1 to Zen 5 processors with simultaneous multithreading enabled, which fully breaks the guest's integrity. AMD released microcode patches 32. On the GPU side, an independent analysis of NVIDIA's confidential computing by IBM Research and Ohio State University found that bulk command and data transfers are protected, but some metadata, timing behaviour and coordination signals remain in unprotected shared memory. The authors report that these can reveal computational behaviour and in some cases allow manipulation of operations. They disclosed the findings to NVIDIA 36.

  • Attestation covers launch state, and measurements can be incompleteSignificantTheoretical argumentOpen

    Attestation measures launch state, not runtime state. Data loaded later, such as model weights, must be bound separately 10. Gloria Z argues that gaps in measuring feature flags, environment variables and invocation arguments are "perhaps the most likely failure mode". She also warns that a badly designed hashing scheme could let two models with significantly different properties share a hash "without breaking the hash function itself" 11. Independent reviews of production systems have found such gaps. In WhatsApp's deployment, Trail of Bits found environment variables and ACPI tables loaded outside the measurement, and rated both high severity. Meta fixed them 29 30. On an Apple PCC node running in Apple's research environment, a researcher reports that tampered configuration files left the attestation unchanged 26.

  • Deployment-level attestation does not cover the whole chipSignificantTheoretical argumentOpen

    An attestation shows what one confidential VM runs. It does not show what else the hypervisor runs on the same hardware. Gloria Z calls the difference between deployment-level attestation and chip-wide monitoring "the gaping hole in this plan" 11. This matters most for negative claims such as the absence of training.

  • Root of trust concentrated in a few hardware vendorsSignificantTheoretical argumentOpen

    The root of trust is the certificate authorities of a small number of vendors (AMD, Intel and NVIDIA), which generate the keys and fuse them onto the chips. Gloria Z notes that whoever has access to a hardware key, or can certify one, can in principle produce valid reports for arbitrary measurements without the physical chip 11. Attestable Audits notes that the approach holds only "as long as the vendor of the secure hardware is trusted" 8. A 2026 preprint reports that a host with root control and the ability to rewrite platform flash can downgrade an AMD EPYC Milan processor to legacy security-processor firmware and extract the hardware root seed from which SEV-SNP attestation keys are derived. The authors state that this lets them forge attestation reports for any firmware version 37. AMD describes the firmware-loader flaw the attack starts from as a legacy attack mitigated in 2021 38.

Blockers

Technical detail

NVIDIA describes the GPU attestation chain as follows. An on-die root of trust verifies the identity key fused into the GPU and permits only NVIDIA-signed firmware at boot. The driver then opens an SPDM session with the GPU, using a Diffie-Hellman exchange to set up a session key 1. The GPU presents a device identity certificate signed with a device-unique ECC-384 key, which chains to the NVIDIA certificate authority. It then returns a signed set of measurements 2.

Other details of NVIDIA's design:

  • Traffic between the confidential VM and the GPU is protected with AES-GCM through encrypted bounce buffers. NVIDIA states that in future, hosts with TDISP/IDE-compatible CPUs and Blackwell B100/B200 GPUs can use inline encryption instead 1.
  • Hopper's protected-PCIe mode passes all eight GPUs of an HGX node to one confidential VM, but NVLink traffic between them stays unencrypted. Blackwell also encrypts NVLink, for up to eight GPUs per confidential VM 1.
  • Performance counters are disabled in full CC-On mode. They are available only in a CC-DevTools development mode 1.
  • At launch, NVIDIA reported that H100 compute and HBM bandwidth were at par with non-confidential mode. CPU–GPU transfers were limited to roughly 4 GB/s by CPU encryption 2.

Three systems bind application data to a report:

  • PAL*M sets the Intel TDX REPORTDATA field to the concatenation of the operation, a verifier challenge and hashes of the inputs and outputs. It models the protocol in the Tamarin prover 9.
  • Attestable Audits publishes attestations that bind the model hash, the audit code and data, and the result to a transparency log 8.
  • Tinfoil puts a dm-verity root hash of the weights on the measured kernel command line 10.

Sources

  1. BNVIDIA (2025). NVIDIA Secure AI with Blackwell and Hopper GPUs (White Paper). NVIDIA documentation. Source recordSupports: GPU CC architecture, CPU-TEE pairing, multi-GPU modes, threat model scope, performance counters in CC mode and NVIDIA's side-channel reason · pp. 6-18
  2. CE. Apsey et al. (2023). Confidential Computing on NVIDIA H100 GPUs for Secure and Trustworthy AI. NVIDIA Technical Blog. Source recordSupports: H100 root of trust, device identity key, attestation report, launch performance · blog, sections on root of trust and performance
  3. AJ. Chuang et al. (2026). TEE.fail: Breaking Trusted Execution Environments via DDR5 Memory Bus Interposition. 2026 IEEE Symposium on Security and Privacy (SP). Source recordSupports: TEE design aim; memory-bus interposition attack; Intel PCK extraction and forged SGX/TDX attestations; SEV-SNP OpenSSL key recovery; H100 attestation relay; disclosure and vendor positions · Abstract; §1.1-1.2; §3; §8.3; §10.2; site FAQ
  4. AJ. De Meulemeester et al. (2026). Battering RAM: Low-Cost Interposer Attacks on Confidential Computing via Dynamic Memory Aliasing. 47th IEEE Symposium on Security and Privacy (S&P 2026). Source recordSupports: Battering RAM: DDR4 interposer cost; Scalable SGX plaintext access and provisioning-key extraction; SEV-SNP attestation breach by launch-digest replay; DDR4-only scope; Intel and AMD positions · Abstract; §1 contributions; site FAQ
  5. AA. Seto et al. (2025). WireTap: Breaking Server SGX via DRAM Bus Interposition. 2025 ACM SIGSAC Conference on Computer and Communications Security (CCS '25). Source recordSupports: WireTap: DDR4 interposer cost; extraction of the SGX Quoting Enclave attestation key and forged quotes; DDR5 Xeons not affected; Intel position and mitigation · Abstract; site FAQ
  6. AB. Schlüter & S. Shinde (2025). RMPocalypse: How a Catch-22 Breaks AMD SEV-SNP. 2025 ACM SIGSAC Conference on Computer and Communications Security (CCS '25). Source recordSupports: RMPocalypse: software-only RMP corruption by a malicious hypervisor; forged SEV-SNP attestation, debug, memory access and register replay; affected Zen generations; CVE · Abstract; site; responsible disclosure
  7. BAMD (2025). SEV-SNP RMP Initialization Vulnerability (AMD-SB-3020). AMD product security bulletin. Source recordSupports: AMD's severity rating and firmware mitigations for CVE-2025-0033 (vendor-reported) · Mitigation tables; revision history
  8. BC. Schnabl et al. (2025). Attestable Audits: Verifiable AI Safety Benchmarks Using Trusted Execution Environments. ICML 2025 Workshop on Technical AI Governance. Source recordSupports: audit protocol, AWS Nitro prototype, overheads, vendor trust, cited TEE attacks and image revocation · §2, §3, §5 Table 2, §7
  9. BP. Chantasantitam et al. (2026). PAL*M: Property Attestation for Large Generative Models. arXiv. Source recordSupports: property attestation on TDX + H100, REPORTDATA binding, overheads, threat model exclusions, code status · Abstract; §3-§6, Tables 2-6
  10. CTinfoil Team (2026). How Tinfoil Proves Exactly What Model Is Running. Tinfoil. Source recordSupports: launch-state vs runtime; dm-verity weight binding · sections on the challenge and the three phases
  11. CGloria Z (2026). On TEEs for Privacy-Preserving Monitoring in AI Governance. MIRI Technical Governance Team. Source recordSupports: international threat model, vendor root of trust, measurement incompleteness, hashing-scheme warning, deployment vs chip-wide gap, process-level enforcement, counter side channels
  12. AA. Dhar et al. (2025). GuardAIn: Protecting Emerging Generative AI Workloads on Heterogeneous NPU. 2025 IEEE Symposium on Security and Privacy. Source recordSupports: device-only NPU TEE with task attestation; overheads; threat model · Abstract; threat model; evaluation
  13. BA. O'Gara et al. (2025). Hardware-Enabled Mechanisms for Verifying Responsible AI Development. arXiv. Source recordSupports: open question on TEEs for verifying AI training at scale · §2.2.4
  14. BO. Aarne et al. (2024). Secure, Governable Chips: Using On-Chip Mechanisms to Manage National Security Risks from AI & Advanced Computing. Center for a New American Security. Source recordSupports: existing technologies need hardening for adversarial settings · Key findings
  15. BG. Kulp et al. (2024). Hardware-Enabled Governance Mechanisms: Developing Technical Solutions to Exempt Items Otherwise Classified Under Export Control Classification Numbers 3A090 and 4A090. RAND Corporation. Source recordSupports: physical-access key extraction caveat for encrypted memory · p. 20
  16. CFuture of Life Institute (2023). Exploration of secure hardware solutions for safe AI deployment. Future of Life Institute. Source recordSupports: FLI and Mithril SGX proof-of-concept and its stated limitations
  17. BJ. Petrie & O. Aarne (2025). Technical Options for Flexible Hardware-Enabled Guarantees. arXiv. Source recordSupports: TEE-backed software vs physical access; early-access CC lacked multi-node · sections on software/TEE options
  18. BTinfoil (2026). A primer on secure enclaves. Tinfoil documentation. Source recordSupports: Tinfoil hardware, trust model, report signing keys, documented limitations (provider-reported) · Supported hardware; Trust model; Limitations
  19. BTinfoil (2026). Backend infrastructure. Tinfoil documentation. Source recordSupports: memory encryption against host software, reproducible builds and transparency log, client verification, boot-time GPU attestation check (provider-reported)
  20. BTinfoil (2026). How verification works in Tinfoil. Tinfoil documentation. Source recordSupports: production deployment of Tinfoil's inference enclaves (provider-reported) · In-band vs. out-of-band verification
  21. BTinfoil (2026). modelwrap: Reproducible dm-verity read-only image of Huggingface models. GitHub. Source recordSupports: public open-source implementation (v0.3.0)
  22. CC. Su (2024). Now in General Availability: NVIDIA H100 GPUs in Microsoft Azure Confidential Virtual Machines. NVIDIA Blog. Source recordSupports: general availability of Azure confidential VMs with H100 GPUs (vendor-reported)
  23. CJ. Yagnik (2025). Private AI Compute: our next step in building private and helpful AI. Google blog (The Keyword). Source recordSupports: Google Private AI Compute: remote attestation to a sealed TPU environment (provider-reported)
  24. CApple Security Engineering and Architecture (SEAR) (2024). Private Cloud Compute: A new frontier for AI privacy in the cloud. Apple Security Research blog. Source recordSupports: Apple PCC: devices send requests only to nodes attesting to software in a public transparency log (provider-reported)
  25. CApple Security Engineering and Architecture (SEAR) (2026). Expanding Private Cloud Compute. Apple Security Research blog. Source recordSupports: Apple PCC extended to Google Cloud on NVIDIA confidential computing and Intel TDX (provider-reported)
  26. CD. Selmanaj (2026). Beyond Prompt Injection: Hacking Apple's Private Cloud Compute. Sentry blog. Source recordSupports: independent finding that a PCC node with tampered configuration passed attestation; fix
  27. CAnthropic & Pattern Labs (2025). Confidential Inference via Trusted Virtual Machines. Anthropic research. Source recordSupports: Anthropic's confidential inference design sketch (provider-reported)
  28. BMeta (2026). Private Processing for WhatsApp: Technical White Paper and Security Guide. Meta. Source recordSupports: WhatsApp Private Processing hardware and client attestation checks (provider-reported)
  29. CTrail of Bits (2026). What we learned about TEE security from auditing WhatsApp's Private Inference. Trail of Bits blog. Source recordSupports: Trail of Bits audit of WhatsApp Private Processing: finding counts, unmeasured configuration data, missing freshness, fixes, SEV-SNP physical-attack caveat
  30. BTrail of Bits (2025). Meta WhatsApp Private Processing (security review). Trail of Bits publications library. Source recordSupports: Trail of Bits' finding counts by severity and titles of the eight high-severity findings, including unmeasured environment variables and ACPI tables and unverified GPU attestation
  31. BNVIDIA (2026). NVIDIA Trusted Computing Solutions Release Notes (R595 TRD1). NVIDIA documentation. Source recordSupports: confidential modes generally available in NVIDIA's R595 release (April 2026); no multi-node mode listed (vendor-reported)
  32. AR. Zhang et al. (2026). StackWarp: Breaking AMD SEV-SNP Integrity via Deterministic Stack-Pointer Manipulation through the CPU's Stack Engine. 35th USENIX Security Symposium (USENIX Security '26). Source recordSupports: StackWarp: software-only integrity break of SEV-SNP guests on Zen 1-5; AMD microcode patches
  33. AJ. De Meulemeester et al. (2026). DDRop: Active Memory Interposer Attacks on Confidential VMs by Dropping DDR5 Writes. 2026 ACM SIGSAC Conference on Computer and Communications Security (CCS '26). Source recordSupports: DDRop: active DDR5 interposer cost; debug-mode forcing and forged attestation reports on up-to-date TDX; SGX and SEV-SNP integrity breaks; vendor positions and advisories · Abstract; threat model; case studies; site FAQ
  34. AB. Schlüter et al. (2026). Fabricked: Misconfiguring Infinity Fabric to Break AMD SEV-SNP. 35th USENIX Security Symposium (USENIX Security '26). Source recordSupports: Fabricked: software-only Infinity Fabric misconfiguration; arbitrary read and write and forged SEV-SNP attestation on Zen 5 · Abstract; evaluation
  35. BAMD (2026). SEV-SNP Routing Misconfiguration (AMD-SB-3034). AMD product security bulletin. Source recordSupports: AMD's severity rating and firmware mitigations for CVE-2025-54510 (vendor-reported) · Summary; mitigation tables
  36. AZ. Gu et al. (2026). Blueprint, Bootstrap, and Bridge: A Security Look at NVIDIA GPU Confidential Computing. Proceedings of the 9th MLSys Conference (MLSys 2026). Source recordSupports: independent security analysis of NVIDIA GPU confidential computing: residual metadata, timing and coordination leaks; disclosure to NVIDIA · Abstract; conclusion
  37. BM. Shen & Y. Qin (2026). Insecure Despite Proven Updated: Extracting the Root VCEK Seed on EPYC Milan via a Software-Only Attack. arXiv. Source recordSupports: software-only extraction of the SEV-SNP VCEK root seed on EPYC Milan via firmware downgrade; forged reports for any firmware version · Abstract; contributions; disclosure
  38. BAMD (2026). MilanLaunchy Firmware Loader (AMD-SB-3045). AMD product security bulletin. Source recordSupports: AMD's view of MilanLaunchy as a legacy attack mitigated in 2021 (vendor-reported) · Summary

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Also called Confidential computing; GPU confidential computing; Remote attestation; Confidential VM attestation

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