Amodo Design

A hardware engineering company that builds and publishes prototypes for verifying AI agreements, including inference recomputation, network taps and memory wiping.

amododesign.com

Amodo Design builds engineering tools for research ¹. Its public verification work is a series of design notes, prototypes and code:

Recomputation. Amodo sets out example schemes for checking inference and pre-training by recomputation ² (Sampled inference recomputation, Whole-workload recomputation (reproducible packets)). It re-implemented DiFR, an inference-checking method published by Karvonen et al., in an asynchronous recomputation prototype ³. It tested the prototype with models of 1.5 to 120 billion parameters on H100 and H200 GPUs, and published the code ³ ⁴.
Network taps. Its notes cover a first passive tap test, a survey of taps for fast optical links, benchmarks of traffic hashing, and a tap fitted to its inference-verification prototype ⁵ ⁶ ⁷ ⁸; see Network taps and certifiers.
Bandwidth boundary. For weight security, Amodo replaced a node's network cards with DPUs that enforce rate limits on 400G links ⁹; see Bandwidth limits and compartmentalization.
Memory wiping. It implemented the memory-filling step of a proof of secure erasure, benchmarked label generation on GPUs, CPUs and NVMe drives, and published code for the disk-wiping path ¹⁰ ¹¹ ¹². Integrating the wipe into a full verification scheme, with its timed challenges, is still to come ¹⁰ ¹¹; see Memory wiping and proofs of secure erasure.
Power monitoring. A note on data-centre power delivery argues that each stage from voltage regulator to grid filters out compute-level detail, so that measurements lower in the chain keep more of it ¹³; see Workload classification from telemetry and side channels.
AI 2040 plan. The AI Futures Project lists Amodo as engineering the inference-only retrofit in its verification plan ¹⁴. Amodo publishes a status page that grades each workstream ¹⁵, and its team reports that none of the plan's components is yet past a proof-of-principle prototype ¹⁶.

On this page

Mechanisms and implementations whose records cite or describe this organization's work.

R3Sampled inference recomputation
A verifier re-runs a random sample of an AI provider's logged queries on a trusted copy of the declared model and checks the outputs match.
R2Bandwidth limits and compartmentalization
Capping or removing network links between groups of accelerators, so that serving within each group still works but large training across groups becomes far slower.
R2Timed challenge-response and memory-occupation challenges
A verifier sends unpredictable questions that a device can answer in time only if it holds specified data, or dedicates specified resources, locally.
R2Workload classification from telemetry and side channels
Telling whether chips are training, serving or doing non-AI work from GPU counters or power draw, signals that do not read weights or data.
R1Memory wiping and proofs of secure erasure
Overwriting a device's memory in a way a verifier can check, so that data from earlier, undeclared work cannot persist in memory the wipe reaches.
R1Network taps and certifiers
Devices on a cluster's network links that copy and hash all traffic, so a verifier can later check sampled records against declared work.
R1Whole-workload recomputation (reproducible packets)
Organizing all AI workloads in a facility into discrete, reproducible units, so that a verifier can recompute a random sample and check each one.
R2DiFR (Divergence From Reference)
DiFR checks that an inference provider ran its declared model by comparing output tokens or activations with a trusted re-run using the same random seed.
R1AI 2040 inference-only verification stack
A proposed retrofit that isolates data-centre inference units, taps their front-end traffic and recomputes random samples to check that only declared inference runs.

Publications

Sources this organization authored or published.

CAmodo Design (2026). AI 2040 Plan A — Verification SITREP. Amodo Design. Source recordCited by Deterministic and bit-exact inference; Whole-workload recomputation (reproducible packets); Sampled inference recomputation; AI 2040 inference-only verification stack; DiFR (Divergence From Reference); TOPLOC; Amodo Design
BAmodo Design: About Us. Amodo Design. Source recordCited by Amodo Design
BAmodo Design (2026). Amodo-Design/Inference-Recomputation-Prototype (GitHub repository). GitHub. Source recordCited by Network taps and certifiers; Sampled inference recomputation; DiFR (Divergence From Reference); Amodo Design
BAmodo Design (2026). Amodo-Design/PoSE-Memory-Wiping (GitHub repository). GitHub. Source recordCited by Memory wiping and proofs of secure erasure; Amodo Design
CAmodo Design (2026). An Inference Verification Prototype — Stage 1. Amodo Design. Source recordCited by Sampled inference recomputation; DiFR (Divergence From Reference)
CAmodo Design (2026). Example Schemes for Verifying High-Stakes AI Agreements. Amodo Design. Source recordCited by Deterministic and bit-exact inference; Whole-workload recomputation (reproducible packets); Sampled inference recomputation; TOPLOC; Cryptographic commitment; Evidence binding; Recomputation; Sampling and assurance; Amodo Design
CAmodo Design (2026). Fitting a Network TAP to our Inference Verification Prototype. Amodo Design. Source recordCited by Network taps and certifiers; AI 2040 inference-only verification stack; Amodo Design
CAmodo Design (2026). Improving Disk Wiping Speed for Memory Wipes. Amodo Design. Source recordCited by Memory wiping and proofs of secure erasure; Amodo Design
CAmodo Design (2026). Memory Wipes - Performance Analysis. Amodo Design. Source recordCited by Memory wiping and proofs of secure erasure; Timed challenge-response and memory-occupation challenges; Amodo Design
CAmodo Design (2026). Network Tapping for AI Verification: A Technical Assessment. Amodo Design. Source recordCited by Network taps and certifiers; Amodo Design
CAmodo Design (2026). Network Taps — A First Test. Amodo Design. Source recordCited by Network taps and certifiers; Amodo Design
CAmodo Design (2026). Network Traffic Hashing. Amodo Design. Source recordCited by Network taps and certifiers; Amodo Design
CAmodo Design (2026). Scaling Recomputation Inference Verification. Amodo Design. Source recordCited by Whole-workload recomputation (reproducible packets); Sampled inference recomputation; DiFR (Divergence From Reference); Amodo Design
CAmodo Design (2026). The Tray as a Bandwidth Boundary. Amodo Design. Source recordCited by Bandwidth limits and compartmentalization; Communication between compute groups is bounded; Amodo Design
CAmodo Design (2026). Understanding Data Center Power Delivery. Amodo Design. Source recordCited by Workload classification from telemetry and side channels; Amodo Design
CT. Milton et al. (2026). Verifying international AI deals: Plan A, the state-of-play, and what you can do to help. Amodo (Substack). Source recordCited by AI 2040 inference-only verification stack; This compute runs inference, not training; Amodo Design

Sources

BAmodo Design: About Us. Amodo Design. Source recordSupports: engineering company building tools for research
CAmodo Design (2026). Example Schemes for Verifying High-Stakes AI Agreements. Amodo Design. Source recordSupports: example recomputation schemes for inference and pre-training
CAmodo Design (2026). Scaling Recomputation Inference Verification. Amodo Design. Source recordSupports: re-implementation of DiFR (Karvonen et al.) in an asynchronous recomputation prototype; test scale
BAmodo Design (2026). Amodo-Design/Inference-Recomputation-Prototype (GitHub repository). GitHub. Source recordSupports: prototype code
CAmodo Design (2026). Network Taps — A First Test. Amodo Design. Source recordSupports: first passive tap test
CAmodo Design (2026). Network Tapping for AI Verification: A Technical Assessment. Amodo Design. Source recordSupports: survey of taps for fast optical links
CAmodo Design (2026). Network Traffic Hashing. Amodo Design. Source recordSupports: traffic-hashing benchmarks
CAmodo Design (2026). Fitting a Network TAP to our Inference Verification Prototype. Amodo Design. Source recordSupports: tap fitted to the inference-verification prototype
CAmodo Design (2026). The Tray as a Bandwidth Boundary. Amodo Design. Source recordSupports: DPU-enforced rate limits on 400G links for weight security
CAmodo Design (2026). Memory Wipes - Performance Analysis. Amodo Design. Source recordSupports: memory-filling step of a proof of secure erasure and its benchmarks; challenge phase still to come
CAmodo Design (2026). Improving Disk Wiping Speed for Memory Wipes. Amodo Design. Source recordSupports: disk-wiping benchmarks; integration into a full verification scheme still needed
BAmodo Design (2026). Amodo-Design/PoSE-Memory-Wiping (GitHub repository). GitHub. Source recordSupports: disk-wiping code
CAmodo Design (2026). Understanding Data Center Power Delivery. Amodo Design. Source recordSupports: analysis of data-centre power delivery
CAI Futures Project (2026). Get Involved in Verification. AI 2040. Source recordSupports: listed as engineering the inference-only retrofit
CAmodo Design (2026). AI 2040 Plan A — Verification SITREP. Amodo Design. Source recordSupports: status page grading the plan's workstreams
CT. Milton et al. (2026). Verifying international AI deals: Plan A, the state-of-play, and what you can do to help. Amodo (Substack). Source recordSupports: team post: no component past a proof-of-principle prototype

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Sources