Mechanisms · category

Compute accounting & provenance

Establishing what compute exists, where it is and what it can do: chip registries, manufacturing records, location verification, capacity bounds.

Name	Type	Readiness	Verifies	Threat model
Timed challenge-response and memory-occupation challenges A verifier sends unpredictable questions that a device can answer in time only if it holds specified data, or dedicates specified resources, locally.	Mechanism	R2Demonstrated	Declared hardware is idle or shut down This compute runs inference, not training Chips are where they are declared to be	Adversarial prover
Chip location verification Timing a chip's signed replies to trusted servers at known places, so that the speed of light bounds how far away the chip can be.	Mechanism	R1Proposed	Chips are where they are declared to be There is no undeclared relevant compute	Adversarial prover
Chip registries and manufacturing records Recording each AI chip's identity and owner from the fab onwards, and cryptographically fixing manufacturing records, so that chips can be accounted for later.	Mechanism	R1Proposed	Compute stock is at most a declared amount There is no undeclared relevant compute Chips are where they are declared to be	Semi-trusted prover
Hardware performance throttling and licensing On-chip mechanisms that cut an AI accelerator's performance when a license expires or a trusted trigger fires, bounding what the hardware can do.	Mechanism	R1Proposed	Compute stock is at most a declared amount A training run stayed within declared limits Declared hardware is idle or shut down	Adversarial prover
Lucid sovereignty (location) certificates A draft specification, hosted by Lucid Computing, for short-lived certificates that bound where a workload runs by timing signed exchanges with fixed anchors. Provider-reported	Implementation	R1Proposed	Chips are where they are declared to be	Semi-trusted prover

Includes records that list this as a secondary category. Claims in grey italics are supported rather than aimed at.